The present invention relates generally to digital logic circuits and, more particularly, to a digital signal voltage level shifter and a method for shifting a digital signal between two voltage levels.
Digital logic circuits are widely used in the areas of electronics and computers. However, the various digital logic circuits that communicate with one another may operate at different power supply voltages. The voltages of digital signals in the different voltage domains are then different. For example, a digital integrated circuit may include a central logic core that operates at a low power supply voltage, since operating at the lower voltage reduces power consumption. On the other hand, an input/output (I/O) section may operate at a higher power supply voltage level, so that the logic levels of the I/O section are at a higher voltage than the logic core to ensure a higher signal to noise ratio. For example, the I/O section may operate at supply voltages ranging from 3.3V to 5V, while the logic core operates at 0.5V to 1.5V. The logic levels of standard interface lines may operate at yet another voltage. Therefore, interface circuits are required to ensure smooth communication of digital signals between digital logic circuits in different voltage domains operating at different voltages even if they are part of the same integrated circuit. Another example is a Universal Serial Bus (‘USB’) communication between a source in a low voltage domain sending data at a certain frequency, such as 100 MHz for example, with a low peak-to-peak voltage swing, such as 1.2 V for example, to be received by a destination block in a high voltage domain whose signals have a higher peak-to-peak voltage swing, such as 2.5 V for example. A voltage level shifter interface may enable communication between the different voltage domains at the same frequency.
In particular, an interface circuit is required that allows a shift in the voltage of a digital signal between a low supply voltage (VDDL) level and a higher supply voltage (VDDH) level. This voltage level shifter acts as an interface between a logic circuit operating in the low power supply voltage (VDDL) domain and a logic circuit operating in the higher power supply voltage (VDDH) domain. However, a voltage level shifter may also be used as an interface between a logic circuit operating in the higher power supply voltage (VDDH) domain and a logic circuit operating in the low power supply voltage (VDDL) domain.
If the voltage level shifter operates on dual source and destination power supply voltages, that is to say with both VDDL and VDDH power supply voltages, power supply rail connections of the voltage level shifter to both VDDL and VDDH are required. Extra connections lead to congestion in the circuit layout, as well as extra pin counts and design complexity, notably of the power supply grid.
In integrated circuits, such as system-on-chip (‘SOC’s) with more than one voltage domain, there may be thousands of signals that require voltage level shifting. Power consumption is a constant preoccupation. The power consumption of the voltage level shifters is significant. The rising and falling edges of digital signals are not instantaneous transitions but exhibit slew. Voltage level shifters may exhibit increased power consumption in the presence of such slew, especially if the switching ON and OFF of different switches are not simultaneous and establish even temporary leakage paths between the input terminal and power supply rails at a different voltage, for example.